Supervisor: Dr Greta Yorsh
Research group(s): Theory
Production compilers such as LLVM, GCC, Intel C compiler, and Microsoft Visual Studio compiler can generate efficient code for common target architectures. However, it is challenging for compiler developer to keep up with the huge variety of new processor designs, spanning a spectrum of low-power and high-performance computing. The goal of this project is to design and implement a new compiler architecture that (a) guarantees correctness of generated code and (b) provides a way to explore the trade-off between compilation time and efficiency of generated code. If a programmer increases the time budget allotted for compilation, it will generate better code in terms of running time, code size, power consumption, energy efficiency, or other metrics. Ultimately, the generated code can take full advantage of the capabilities of new process designs, without the need to modify the compiler. The idea is to perform code generation and optimization using novel constraint solving techniques. This approach separates the concerns of software application logic, programming language semantics, architecture specification, and hardware performance modelling. Programmers, compiler writers, and hardware designers will benefit from this approach, which allows each of them to concentrate on aspects of the problem that match their expertise. A suggested starting point for this project is based on LLVM compiler and modern SMT Solver technology. Research can focus on theoretical or practical aspects of the project, depending on the interests and skills of the student.